1996 Technical Reports
CSTD-96-001 Architectural Considerations In a Self-Timed Processor Design Richardson, William abstract pdf ps
UUCS-96-001 Low Latency Workstation Cluster Communications Using Sender-Based Protocols Swanson, Mark R.; Leigh B. Stoller abstract pdf ps
UUCS-96-002 Message Passing Support in the Avalanche Widget Swanson, Mark R.; Ravindra Kuramkote; Leigh B. Stoller; Terry Tateyama abstract pdf ps
UUCS-96-004 Microkernels Meet Recursive Virtual Machines Ford, Bryan; Mike Hibler, Jay Lepreau, Patrick Tullmann, Godmar Back, Shantanu Goel, and Steven Clawson abstract pdf ps
UUCS-96-005 Flexible Multi-Policy Scheduling based on CPU Inheritance Ford, Bryan; Sai R. Susarla abstract pdf ps
UUCS-96-006 Partial Order Reduction Without the Proviso Ratan Nalumasu, Ganesh Gopalakrishnan abstract pdf ps
UUCS-96-009 Paint: PA Instruction Set Interpreter Leigh B. Stoller; Mark R. Swanson, and Ravindra Kuramkote abstract pdf ps
UUCS-96-010 The Avalanche Myrinet Simulation Package Chen-Chi Kuo, John B. Carter abstract pdf ps
UUCS-96-011 A Comparison of Software and Hardware Synchronization Mechanisms for Distributed Shared Memory Multiprocessors John B. Carter, Chen-Chi Kuo, and Ravindra Kuramkote abstract pdf ps