10.3.4 debug_reg.h: Debug register definitions and accessor functions

 

SYNOPSIS

#include <oskit/x86/debug_reg.h>

DESCRIPTION

This provides the definitions for the processor's built-in debug registers. There are also inline functions that allow the hardware-assisted breakpoints to be set.

DR0 through DR3 are the breakpoint address registers; DR6 is the status register, and DR7 is the control register.

get_dr0()

  Returns the value in breakpoint address register 0.

get_dr1()

  Returns the value in breakpoint address register 1.

get_dr2()

  Returns the value in breakpoint address register 2.

get_dr3()

  Returns the value in breakpoint address register 3.

get_dr6()

  Returns the value in the debug status register.

get_dr7()

  Returns the value in the debug control register.

set_dr0(val)

  Sets the value in breakpoint address register 0 to val.

set_dr1(val)

  Sets the value in breakpoint address register 1 to val.

set_dr2(val)

  Sets the value in breakpoint address register 2 to val.

set_dr3(val)

  Sets the value in breakpoint address register 3 to val.

set_dr6(val)

  Sets the value in the debug status register to val.

set_dr7(val)

  Sets the value in the debug control register to val.

set_b0(unsigned addr, unsigned len, unsigned rw)

  Enables breakpoint register 0. Sets dr0 to LINEAR address addr and updates dr7 to enable it. rw must be DR7_RW_INST, DR7_RW_WRITE, DR7_RW_IO, or DR7_RW_DATA indicating the condition to break on. len must be DR7_LEN_1, DR7_LEN_2, or DR7_LEN_4, indicating how many bytes are covered by the register.

set_b1(unsigned addr, unsigned len, unsigned rw)

  Enables breakpoint register 1.

set_b2(unsigned addr, unsigned len, unsigned rw)

  Enables breakpoint register 2.

set_b3(unsigned addr, unsigned len, unsigned rw)

  Enables breakpoint register 3.